Patent
1996-12-26
1998-07-14
Lim, Krisna
G06F 938
Patent
active
057817529
ABSTRACT:
A predictor circuit permits advanced execution of instructions depending for their data on previous instructions by predicting such dependencies based on previous mis-speculations detected at the final stages of processing. Synchronization of dependent instructions is provided by a table creating entries for each instance of potential dependency. Table entries are created and deleted dynamically to limit total memory requirements.
REFERENCES:
patent: 5664138 (1997-09-01), Yoshida
patent: 5666506 (1997-09-01), Hesson et al.
Gurinda Sohi et al., Instruction Issue Logic for High-Performance Interruptable Pipelined Processors; ACM 1987, pp. 27-34.
Breach Scott E.
Moshovos Andreas I.
Sohi Gurindar S.
Vijaykumar Terani N.
Lim Krisna
Wisconsin Alumni Research Foundation
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