Patent
1989-04-03
1990-06-19
Larkins, William D.
357 15, 357 22, 357 68, H01L 29812
Patent
active
049358057
ABSTRACT:
On a semiconductor substrate (14, 38) T-type undercut electrical contact structure (12, 36) and methodology provides a diffusion barrier (26, 40) preventing migration therethrough from a gold layer (30, 48) along the sides of an undercut schottky metal lower layer (28, 44) into the active region of the semiconductor substrate. In one embodiment, the diffusion barrier (26) is provided at the base of the gold layer (30). In another embodiment, the gold layer (48) is encapsulated by the diffusion barrier (40) on the bottom (46) and sides (56). The diffusion barrier base layer is deposited. The diffusion barrier side layers are electroplated.
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Bie Paul R.
Calviello Joseph A.
Ward David
Eaton Corporation
Larkins William D.
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