Systolic architectures for sonar processing

Details Systolic architectures for sonar processing Systolic architectures for sonar processing

1986-08-04

1988-07-19

Tarcza, Thomas H.

Communications, electrical: acoustic wave systems and devices

Distance or direction finding

With beam steering, scanning, or focussing

367119, 364516, G01S 380

Patent

active

047589990

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND AND SUMMARY OF THE INVENTION

Current sonar systems employ both time and space diversity to achieve a high level of operational performance. This, together with the complex geometry and relatively slow speed of sound propagation in the ocean, has imposed many constraints on the concomitant signal processing system. For example, low sonar operating frequencies and the use of wide-band processing have forced the use of broad-band beamforming. Further, ever-increasing numbers of hydrophonic elements are being used for high spectral resolution and the signal processing system must be capable of forming in parallel large numbers of independent beams in order to attain an adequate angular cover as well as giving the desired spectral resolution. In addition, for towed systems in particular, the geometry of the array may fluctuate. The general effect of these three observations is to impose an enormous computing load on the signal processing system. Some agencies have developed satellite-to-shore systems which can call on the number crunching power of super-computers like the Cray. In the general environment this is not possible, and hence parallel computers based on VSLI technology must be considered. If such systems are realisable, then there is the added advantage that the system can be carried on small platforms such as helicopters and diesel-electric submarines.
This invention indicates one possible architecture for implementing a limited class of passive broad-band beamformers. It is found that computing loads approaching hundreds of mega-flops can be achieved conceptually with a minimum of silicon area. It is also found that the systems can be made highly reliable by incorporating a limited form of self repair.
A paper by Speiser, J. M., Whitehouse, H. J. and Bromley, K. (1980). `Signal Processing Applications for Systolic Arrays`, Record of the 14th Asimolar Conference on Circuits, Systems and Computers, Pacific Grove, Calif., IEEE 80CH1625-3 addresses the general question but does not give a clear indication of the power of systolic arrays for particular tasks. In contrast, this paper is concerned with a specific design and implementation.
Reference may be had to the specification of Patent Application No. WO 84/04225, published under the provision of the Patent Cooperation Treaty, in which a self repair large scale integrated circuit is described, this application is assigned to the Commonwealth of Australia, having the same inventors as this application namely Marwood, W. and Clarke, A. P.
The invention deals generally with a form of distributed signal processing called a systolic array. The systolic array is a one, two or higher dimensional array of identical processors. In each processor, both the hardware and the executed program is identical. Each processor is connected to nearest neighbours, computes data, and then passes data on to its neighbours at all times in synchronism with a master clock. In physiology, the word `systole` is used for the heart contraction pumping blood. In the systolic array the system clock is the analogue of the heart.
In most sonar signal processing requirements, the basic operations can be written in a matrix form. When this is realised, it can be seen that each processor can consist of a cascaded sequence of processing blocks where each block is a systolic array executing a matrix operation. Hence the total implementation will consist almost entirely of systolic processing elements. Reference may be had to the papers of Whitehouse, H. J. and Speiser, J. M., `Sonar Applications of Systolic Array Technology`, presented at IEEE Eascon, Washington, D.C., Nov. 17-19, 1981, and Speiser, J. M. and Whitehouse, H. J., `Parallel Processing Algorithms and Architectures for Real-Time Signal Processing`, SPEE Vol. 298, Real-Time Signal Processing IV (1981) paper 298-03.
In conventional beamforming, the observation of some propagating, coherent wave in the ambient noise background of the ocean is enhanced by summing time-delayed and weighted hydrophone data. The weights ar

REFERENCES:
Ward et al., "Application of a Systolic Array to Adaptive Beamforming", IEE Proceedings, vol. 131, No. 6, Oct. 1984, pp. 638-645.
Kung, "Special-Purpose Devices for Signal Image Processing: An Opportunity in Very Large Scale Integration (VLSI)", May 1984, pp. 76-84.
McCabe et al., "New Algorithms and Architectures for VLSI", 1982, pp. 68-75.

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