Systems, methods and computer program products for hardware...

Details Systems, methods and computer program products for hardware... Systems, methods and computer program products for hardware...

2008-03-31

2008-11-11

Mai, Tan V (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S504000

Reexamination Certificate

active

07451171

ABSTRACT:
Systems, methods and computer program products for hardware assists for microcoded floating point divide and square root operations. Exemplary embodiments include a method including receiving a first microcoded instruction in the pipeline, decoding the first microcoded instruction in a decode stage of the pipeline, initiating a microcode engine coupled to the processor, with the microcode engine configured to process the streamlined microcode routine. During the delay between detecting the need to start a microcode routine and seeing the first microcode instruction actually issued, and using the processor cycle intended for the original instruction, hardware prepares for the microcode by pre-normalizing the operand, writing the pre-normalized operand to a scratch register coupled to the processor, conditionally generating a final result and discarding microcode routine instructions subsequent to the first microcode routine instruction and copying a final result from the scratch register to a floating point architectural register associated with the processor.

REFERENCES:
patent: 4879676 (1989-11-01), Hansen
patent: 5058048 (1991-10-01), Gupta et al.
patent: 5995991 (1999-11-01), Huang et al.
patent: 6009511 (1999-12-01), Lynch et al.
patent: 2003/0014454 (2003-01-01), Steele, Jr.

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