Systems for synchronizing resets in multi-clock frequency...

Details Systems for synchronizing resets in multi-clock frequency... Systems for synchronizing resets in multi-clock frequency...

2007-08-21

2007-08-21

Payne, David C. (Department: 2611)

Pulse or digital communications

Synchronizers

C713S400000

Reexamination Certificate

active

10640632

ABSTRACT:
Methods and systems for synchronizing a reset signal with a local clock that drives a circuit. In the circuit, the reset signal can be used to reset one or more flip-flops, memory devices, and/or logic. Sychronization of the reset signal allows the reset signal to change at an appropriate time period in relation to the lock clock signal driving the circuit. This ensures the circuit will remain stable during reset, and no data will be lost as it is processed in the circuit. Other aspects of the invention can include using a plurality of reset signals (e.g., software, hardware, local software, etc.) to form the reset signal and using a reset control system to control resets during testing of the circuit.

REFERENCES:
patent: 5473768 (1995-12-01), Kimura
patent: 6487466 (2002-11-01), Miyabe
patent: 6665802 (2003-12-01), Ober
patent: 2002/0091861 (2002-07-01), Kim et al.
patent: 2004/0128578 (2004-07-01), Jonnalagadda

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