Systems, circuits, and methods for pipelined folding and...

Details Systems, circuits, and methods for pipelined folding and... Systems, circuits, and methods for pipelined folding and...

2010-11-18

2011-11-22

Lauture, Joseph (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S161000

Reexamination Certificate

active

08063811

ABSTRACT:
A method and apparatus for performing pipelined capacitive folding and interpolation analog-to-digital conversion. In one embodiment, the apparatus comprises a multistage pipelined analog-to-digital converter having: a distributed sample/hold and preamp, folding and interpolation unit which combines a plurality of preamplified signals using a capacitive folding and capacitive interpolation; and a decoding unit coupled to decode the output signals from the folding and interpolation unit. The distributed sample/hold and preamp drastically improves the input dynamic range and hence increases ADC over all linearity. This technique offers an inherent dynamic offset cancellation in every sample and can be implemented in submicron CMOS, using the core digital supply.

REFERENCES:
patent: 6674389 (2004-01-01), Bult
patent: 6950051 (2005-09-01), Lee et al.
patent: 7893858 (2011-02-01), Hojabri et al.

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