Systems and methods using programmable fixed frequency...

Details Systems and methods using programmable fixed frequency... Systems and methods using programmable fixed frequency...

2008-07-22

2010-11-23

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

C331S011000, C331S014000, C331S00100A, C327S005000, C327S159000

Reexamination Certificate

active

07839222

ABSTRACT:
The disclosure provides systems and methods for programmable fixed frequency digitally controlled oscillators for multirate low jitter frequency synthesis. The present invention utilizes a digital control element, such as a complex programmable logic device (CPLD) or field programmable gate array (FPGA), to monitor the frequency offset of a DCO with respect to one or more timing module (TM) references. The frequency offset is measured by aligning the phase of a DCO feedback divider to the phase of a reference divider, and then counting the number of pulses in the DCO between the falling edges of the feedback to determine a frequency error. Falling edge detection is used to determine a sign of the error. The digital control element then calculates a frequency correction based on a linear scaling factor to send a new control word to the DCO to reduce the frequency error.

REFERENCES:
patent: 6968027 (2005-11-01), Fukuhara
patent: 7126429 (2006-10-01), Mitric

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