Systems and methods using improved clock gating cells

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S211000

Reexamination Certificate

active

08030982

ABSTRACT:
A clock gating cell that comprises a latch in communication with an input enable logic and an output logic circuit, wherein the latch includes a pull-up and/or a pull-down circuit at an input node of the output logic circuit and circuitry preventing premature charge or discharge of the output logic circuit input node by the pull-up and/or the pull-down circuit when the clock gating cell is enabled.

REFERENCES:
patent: 5883529 (1999-03-01), Kumata et al.
patent: 6023179 (2000-02-01), Klass
patent: 6741100 (2004-05-01), Itaka et al.
patent: 2008/0092103 (2008-04-01), Aoyama
patent: 2420034 (2006-05-01), None
International Search Report and Written Opinion—PCT/US2009/062489, ISA/EPO—Jan. 22, 2010.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Systems and methods using improved clock gating cells does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Systems and methods using improved clock gating cells, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systems and methods using improved clock gating cells will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4282447

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.