Systems and methods that employ inductive current steering...

Static information storage and retrieval – Addressing – Current steering

Reexamination Certificate

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C365S233100, C365S016000, C327S374000, C326S030000

Reexamination Certificate

active

07057971

ABSTRACT:
The present invention provides systems and methods that utilize inductive current steering to improve logic circuit performance by mitigating propagation delays associated with conventional transistor current steering. The system and methods employ RF transformers, wherein energizing primary windings induce current in associated secondary windings. In one aspect, a single clock bus is employed to induce the current, which is routed via respective ends of the secondary winding to emitter leads of the transistors. This current and voltage is 180 degrees out-of-phase such that one transistor is “on” while the other is “off,” which generates a differential output. In another aspect, a differential clock signal is employed to induce the current in secondary windings and associated transistor emitters. Further, the systems and methods can be utilized to construct flip-flops and shift registers by coupling differential transistor pairs and driving these pairs with the transformer-based single-ended or differential clock.

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patent: 5663672 (1997-09-01), Nuechterlein
patent: 6833734 (2004-12-01), Chan
patent: 6909309 (2005-06-01), Green
patent: 2002/0057017 (2002-05-01), Chan
Lin Wu, et al.; A Low Jitter 1.25GHz CMOS Analog PLL for Clock Recovery; 0-7803-4455-3/98; IEEE, 1998.
G. Van Der Plas, et al.; Systematic Design of a 14-bit 150-MS/s CMOS Current-Steering D/A Converter; Department of Electrical Engineering, Katholieke Universiteit Leuven, ESAT-MICAS; Heverlee, Belgium.
International Search Report dated Nov. 27, 2005 mailed Dec. 28, 2005 for PCT Application Serial No. PCT/US05/00864, 7 pages.

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