Pulse or digital communications – Synchronizers
Reexamination Certificate
2006-10-27
2011-10-04
Timory, Kabir A (Department: 2611)
Pulse or digital communications
Synchronizers
C375S356000, C375S355000, C375S220000, C375S360000, C375S376000
Reexamination Certificate
active
08031819
ABSTRACT:
Systems and methods for synchronizing an input signal with a substantial mitigation of race conditions and a substantial increase in resolving time are provided. One embodiment includes a system comprising a first latching device configured to latch a first output signal from the input signal and a delay element configured to receive the first output signal and output a delay signal that is a delayed version of the first output signal. The system also includes a pass-gate element configured to receive the first output signal and to output a second output signal in response to a logic state of the delay signal. The second output signal has a delayed input edge without a delayed resolving edge. The system can be configured to force the first output signal to a stable logic state in response to the first output signal having a metastable state.
REFERENCES:
patent: 4949360 (1990-08-01), Martin
patent: 5418407 (1995-05-01), Frenkil
patent: 5487163 (1996-01-01), Keeley
patent: 5522048 (1996-05-01), Offord
patent: 5671258 (1997-09-01), Burns et al.
patent: 6152613 (2000-11-01), Martin et al.
patent: 6205191 (2001-03-01), Portmann et al.
patent: 6507915 (2003-01-01), Franca-Neto
patent: 6594326 (2003-07-01), Portmann et al.
patent: 6690221 (2004-02-01), Chang
patent: 6756819 (2004-06-01), Aikawa
patent: 6906555 (2005-06-01), Ma
patent: 6960941 (2005-11-01), Cantin et al.
patent: 6985547 (2006-01-01), Uht
patent: 7072821 (2006-07-01), Manz et al.
patent: 7075336 (2006-07-01), Kojima et al.
patent: 7076682 (2006-07-01), Jacobson
patent: 2004/0151209 (2004-08-01), Cummings et al.
patent: 2005/0206416 (2005-09-01), Kizer
Berkram Daniel Alan
Henrion Carson Donahue
Zhu Zhubiao
Hewlett--Packard Development Company, L.P.
Timory Kabir A
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