Systems and methods for reduced latency loop recovery

Details Systems and methods for reduced latency loop recovery Systems and methods for reduced latency loop recovery

2011-06-07

2011-06-07

Young, Wayne R (Department: 2627)

Dynamic information storage or retrieval

Specific detail of information handling portion of system

Radiation beam modification of or by storage medium

C369S059150, C369S047280, C369S044290, C369S044350

Reexamination Certificate

active

07957251

ABSTRACT:
Various embodiments of the present invention provide systems and methods for reduced latency feedback in a data processing system. For example, some embodiments provide a data processing system that includes a variable gain amplifier, a processing circuit, a data detector, and an error signal calculation circuit. The variable gain amplifier amplifies a data input signal and provides an amplified signal. The processing circuit generates a signal output corresponding to the amplified signal, and includes a conditional multiplication circuit. The conditional multiplication circuit conditionally multiplies the signal output by a gain correction signal and provides the result as an interim output. The data detector applies a data detection algorithm to the signal output and provides an ideal output. The error signal calculation circuit generates a gain correction signal based at least in part on the interim output and a derivative of the ideal output. The level of amplification by the variable gain amplifier is based at least in part on the gain correction signal.

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