Cleaning and liquid contact with solids – Processes – Including application of electrical radiant or wave energy...
Reexamination Certificate
2000-10-19
2004-10-19
Markoff, Alexander (Department: 1746)
Cleaning and liquid contact with solids
Processes
Including application of electrical radiant or wave energy...
C134S001100
Reexamination Certificate
active
06805139
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The field of this invention relates in general to semiconductor processing. More particularly, the field of the invention relates to systems and methods of stripping photoresist and removing residues from a semiconductor substrate.
2. Background
Future semiconductor manufacturing technologies are expected to have stringent requirements for a variety of specific critical photoresist and residue removal processes, due in part to reductions in component size, increasing circuit speeds, and greater sensitivity of devices to surface contamination. These processes include, but are not limited to: 1) photoresist stripping following a high-dose ion-implantation (HDIS) process, 2) via cleaning, which means the removal of veils and residues following a via etch, particularly in the case where the dielectric layer through which the via is being formed is overlaying an aluminum or copper metallic layer, and 3) photoresist removal in the presence of a low-dielectric constant (low-k) material.
Current photoresist stripping methods are unable to cope with these new stringent requirements. For example, decreasing transistor sizes are making shallower and heavier doping levels necessary, which puts an additional burden on the photoresist mask used to protect the areas that will not be implanted. Another example has to do with vias, where residue free via surfaces are necessary for proper circuit function. Yet, such residues often contain metallic elements, and compounds of those elements with silicon and oxygen, and are therefore physically hard, chemically and reactive, and difficult to remove. As a final example, new requirements for increased speed of a semiconductor circuit dictate that the currently used quartz (silicon dioxide) or spin-on glass dielectric insulation between interconnects be replaced with materials having a lower dielectric constant. The reduction in the dielectric constant, k, reduces the capacitance from any one particular conductor line to an adjacent line, which simultaneously reduces crosstalk between these lines, improving signal speed and integrity. But photoresist removal can be difficult in the presence of a low-k dielectric material because conventionally used techniques are known to attack the dielectric material as well as the photoresist.
The use of a wet bath in the above-mentioned cases is becoming increasingly undesirable due to narrow feature widths, and the fact that materials are becoming increasingly sensitive to surface contamination and to damage from aggressive chemicals. Furthermore, there is increasing pressure to minimize the use of solvents or other wet chemical cleaning processes because of the associated environmental and health concerns, and the attendant costs. Therefore, photoresist stripping and residue removal processes which are critical to advanced circuit manufacturing will need to be accomplished by dry process techniques in the future.
Yet, in order for the integrated circuits fabricated by these dry processing systems to be cost competitive for the consumer electronics, communications and computation markets, the cost of these more difficult and expensive steps must be controlled. This means reducing processing time in the requisite equipment, which is expensive to own and operate. The dependence of wafer manufacturing costs on such processing times is typically multiplied by a factor of at least 10, since there will be that many more critical steps in manufacturing future integrated circuits. Many of the conventional photoresist removal processes—those not involving high dose ion implanted photoresist or low-k materials—are typically easier to perform and efficiently completed in a variety of ashing systems.
Conventional dry photoresist removal systems and processes typically cannot simultaneously meet all the requirements of the aforementioned critical photoresist or residue removal steps, since they exhibit one or more of the following deficiencies: 1) removing photoresist too slowly to be commercially competitive, 2) popping of photoresist previously subjected to high dose ion implantation because of the necessity of high temperature removal (a wafer temperature greater than or equal to about 110 degrees Celsius) in order to achieve commercially acceptable rates, 3) being unable to remove difficult residues or photoresist layers without causing damage to, or sputtering of, exposed sensitive materials, and 4) causing the oxidative degradation or erosion of exposed low-k materials as photoresist is removed.
Typical current-generation photoresist removal systems use remote, low density plasmas generated with gas pressures on the order of 1 Torr as their source of (mostly neutral) reactive species. Typically they use oxygen as the principal process gas. In order to etch the photoresist in such systems the temperature of the wafer may be maintained at or above about 150 degrees Celsius. The problem at these temperatures is that oxygen atoms created in the plasma source can cause the rapid oxidation of photoresist, which is desirable, but at the cost of supplying the necessary activation energy primarily by thermal means. Addition of other gases such as fluorine, nitrogen and/or hydrogen can modestly accelerate the oxidation rate, by chemical means, but not enough to make the process at low wafer temperatures comparable to that at elevated temperatures. In fact, the addition of fluorine to accelerate the reaction can have negative consequences, since it may etch exposed areas of silicon dioxide.
Next, a more specific discussion of the relevant background will be given as it applies to exemplary semiconductor processing applications: 1) photoresist removal following a high-dose ion-implantation process, 2) via cleaning or residue treatment processes, and 3) photoresist removal in the presence of a low-k dielectric.
High dose ion implantation is increasingly necessary to create the very high doping levels needed in thin silicon layers which serve as the components of a transistor in advanced ULSI circuits. Unfortunately, high dose levels can cause crosslinking and degassing of the carbon-based polymers in the photoresist mask. This produces a much tougher and less permeable material, called crust, in the top 1,000 to 3,000 angstroms of the photoresist layer. Such photoresist is subject to “popping” under higher temperature conditions, producing large numbers of carbon-rich particles which may cause defects in the succeeding patterning steps for the integrated circuits. Avoidance of popping typically requires that the processing temperature be kept below some threshold value (about 110 degrees Celsius). Above this temperature the bulk photoresist under the crust evolves organic solvent, leading to a high pressure state within the bulk photoresist which pushes up on the crust above.
FIG. 1
is a schematic illustration of the potential problems that may be encountered hen stripping photoresist at the elevated temperatures necessary to achieve commercially feasible strip rates. Referring to
FIG. 1
, region
102
is an area of silicon wafer
101
which has been ion implanted. The ion implantation process has created a hardened crust
105
on the photoresist mask shown generally at
106
. Crust
105
is a crosslinked version of bulk photoresist
104
, the crosslinking being a result of the ion bombardment (in other words, bulk photoresist that is exposed to ion bombardment becomes crosslinked). Layer
103
is a sacrificial oxide layer generally having a thickness of about a hundred angstroms. Photoresist removal processes that occur at high temperatures can build up a high pressure
107
within bulk photoresist
104
, due mainly to residual solvents in the bulk photoresist. The mask shown generally at
108
has “popped” from the elevated pressure, leading to carbon-containing particulate contamination
109
.
Because of the high activation energy required for reactions between oxygen and the highly cross-linked polymer chains in the crust, etching by conventional oxygen-based ashing proce
Guerra Robert
Helle Wolfgang
Savas Stephen E.
Zajac John
Markoff Alexander
Mattson Technology Inc.
Wilson Sonsini Goodrich & Rosati
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