Systems and methods for multi-channel analog to digital...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C341S120000, C341S118000

Reexamination Certificate

active

06956517

ABSTRACT:
Systems and methods for analog to digital conversion that may be implemented using a digital to analog converter (DAC) to provide negative feedback to cancel signals at the input of an analog to digital converter (ADC), and that may be used to extend the effective dynamic range of an ADC. The systems and methods may be implemented in multi-channel environments.

REFERENCES:
patent: 3894219 (1975-07-01), Weigel
patent: 4531098 (1985-07-01), Reed
patent: 4542265 (1985-09-01), Brady
patent: 5061934 (1991-10-01), Brown et al.
patent: 5221926 (1993-06-01), Jackson
patent: 6198819 (2001-03-01), Farrell et al.
patent: 6373418 (2002-04-01), Abbey
patent: 6516063 (2003-02-01), Farrell et al.
patent: 6661362 (2003-12-01), Brooks
patent: 6734818 (2004-05-01), Galton
patent: 6741701 (2004-05-01), Barak et al.
patent: 6784814 (2004-08-01), Nair et al.
patent: 2296398 (1996-06-01), None
patent: 2296398 (1996-06-01), None
Dr. Martinez, “Intelligent Mixed-Signal Microsystems Technology (IMMST)”, DARPA/MTO, Apr. 25, 2003, 8 pgs.
Matsuya et al., “A 16-Bit Oversampling A-to-D Conversion Technology Using Triple-Integration Noise Shaping”, IEEE Journal Of Solid-State Circuits, vol. SC-22, No. 6, Dec. 1987, pps. 921-929.
Wu et al., “New Current-Mode Wave-Pipelined Architectures For High-Speed Analog-To-Digital Converters”, IEEE Transactions On Circuits And Systems-I: Regular Papers, vol. 51, No. 1, Jan. 2004, pps. 25-37.
Liem et al., “Architecture Of A Single Chip Acoustic Echo And Noise Canceller Using Cross Spectral Estimation”, IEEE, 2003, pps. 637-640, vol. 2., Apr. 2-6, 2003.
Younis et al, “Efficient Adaptive Receivers For Joint Equalization And Interference Cancellation In Multiuser Space-Time Block-Coded Systems”, IEEE Transactions on Signal Processing, vol. 51, No. 11, Nov. 2003, pps. 2849-2862.
Fudge et al, “Spatial Blocking Filter Derivative Constraints For The Generalized Sidelobe Canceller And Music”, IEEE Transactions On Signal Processing, vol. 44, No. 1, Jan. 1996, pps. 51-61.
Lin et al., “A Low-Complexity Adaptive Echo Canceller For XDSL Applications”, IEEE Transactions On Signal Processing, vol. 52, No. 5, May 2004, pps. 1461-1465.
Inerfield et al., High Dynamic Range InP HBT Delta-Sigma Analog-to-Digital Converters, IEEE Journal Of Solid-State Circuits, vol. 38, No. 9, Sep. 2003, pps. 1524-1532.
Harris et al., “New Architectures With Distributed Zeros For Improved Noise Shaping Of Delta-Sigma Analog To Digital Converters”, IEEE, 1993, pps. 421-425, Nov. 1-3, 1993, vol. 1.
Ueno et al., “A Fourth-Order Bandpass Δ-Σ Modulator Using Second-Order Bandpass Noise-Shaping Dynamic Element Matching”, IEEE Journal Of Solid-State Circuits, vol. 37, No. 7, Jul. 2002, pps. 809-816.
Vadipour, “A Bandpass Mismatch Noise-Shaping Technique For Σ-Δ Modulators”, IEEE Transactions On Circuits And Systems-II: Express Briefs, vol. 51, No. 3, Mar. 2004, pps. 130-135.
Lefkaditis et al., “Ambiguities In The Harmonic Retrieval Problem Using Non-Uniform Sampling”, IEEE Proc.-Radar, Sonar Navig., vol. 148, No. 6, Dec. 2001, pps. 325-329.
Sayiner et al., “A Non-Uniform Sampling Technique for A/D Conversion”, Circuits and Systems, ISCAS '93, 1993 IEEE International Symposium, May 3-6, 1993, pps. 1220-1223 vol. 2.
U.S. Appl. No. 10/866,532, filed Jun. 12, 2004, “Systems And Methods For Analog To Digital Conversion” (LCOM:024).
Sumanen et al., “Dual-Mode Pipeline A/D Converter For Direct Conversion Receivers”, Electronics Letters, vol. 38, No. 19, Sep. 2002, pps. 1101-1103.
Stojcevski et al., “A Reconfigurable Analog-To-Digital Converter For Utra-Tdd Mobile Terminal Receiver”, IEEE, 2002, pps. 613-616, vol. 2, Aug. 4-7, 2002.
Petraglia et al., “Analysis Of Mismatch Effects Among A/D Converters In A Time-Interleaved Waveform Digitizer”, IEEE Transactions On Instrumentation And Measurement, vol. 40, No. 5, Oct. 1991, pps. 831-835.
Peralias et al., “Structural Testing Of Pipelined Analog To Digital Converters”, IEEE, 2001, pps. 436-439, vol. 1, May 6-9, 2001.
Ndjountche et al., “Adaptive Calibration Techniques For Time-Interleaved ADCs”, Electronics Letters, vol. 37, No. 7, Mar. 2001, pps. 412-414.
Mortezapour et al, “A Reconfigurable Pipelined Data Converter”, IEEE, 2001, pps. 314-317, vol. 4, May 6-9, 2002.
Lundin et al., “On External Calibration Of Analog-To Digital Converters”, IEEE, 2001, pps. 377-380, Aug. 6-8, 2001.
Liu et al., “A 9-b 40-Msample/s Reconfigurable Pipeline Analog-To-Digital Converter”, IEEE Transactions On Circuits And Systems-II: Analog And Digital Signal Processing, vol. 49, No. 7, Jul. 2002, pps.449-456.
Ganesan et al., “Analog-Digital Partitioning For Field-Programmable Mixed Signal Systems”, IEEE, 2001, pps. 172-185, Mar. 14-16, 2001.
Asuri et al., “Time-Stretched ADC Arrays”, IEEE Transactions On Circuits And Systems-II: Analog And Digital Signal Processing, vol. 49, No. 7, Jul. 2002, pps. 521-524.
Younis et al., “A Calibration Algorithm For A 16-Bit Multi-Path Pipeline ADC”, IEEE Midwest Symp. On Circuits And Systems, 43rd, Aug. 2000, pps. 158-161.
Wang et al., “Tunable Optical Wavelength Converter With Reconfigurable Functionality”, Technical Digest, 1997, pps. 76-77, Feb. 16-21, 1997.
Veljanovski et al., “Reconfigurable Architecture For Utra-TDD System”, Electronics Letters, vol. 38, No. 25, Dec. 2002, pps. 1732-1733.
Velazquez, “High-Performance Advanced Filter Bank Analog-To-Digital Converter For Universal RF Receivers”, IEEE, 1998, pps. 229-232, Oct. 6-9, 1998.
Poorfard et al., “Time-Interleaved Oversampling A/D Converters: Theory And Practice”, IEEE Transactions On Circuits And Systems-II:Analog And Digital Signal Processing, vol. 44, No. 8, Aug. 1997, pps. 634-645.
Jamal et al., “A 10-b 120-Msample/s Time-Interleaved Analog-To-Digital Converter With Digital Background Calibration”, IEEE Journal Of Solid-State Circuits, vol. 37, No. 12, Dec. 2002, pps. 1618-1627.
Gulati et al., “A Low-Power Reconfigurable Analog-To-Digital Converter”, IEEE Journal Of Solid-State Circuits, vol. 36, No. 12, Dec. 2001, pps. 1900-1911.
Lee, “Reconfigurable Analog Integrated Circuit Architecture Based On Switched-Capacitor Techniques”, IEEE, 1996, pps. 148-158, Oct. 9-11, 1996.
Yu et al., “Error Analysis For Time-Interleaved Analog Channels”, IEEE, 2001, pps. 468-471, vol. 1, May 6-9, 2001.
Bernardinis et al, “Dynamic Stage Matching For Parallel Pipeline A/D Converters”, IEEE, 2002, pps. 905-908, vol. 1, May 26-29, 2002.
Batten et al., “Calibration Of Parallel ΔΣ ADCs”, IEEE Transactions On Circuits And Systems-II: Analog And Digital Signal Processing, vol. 49, No. 6, Jun. 2002, pps. 390-399.
Mayes et al, “A Low-Power 1MHz, 25 mW 12-Bit Time-Interleaved Analog-To-Digital Converter”, IEEE Journal On Solid-State Circuits, vol. 31, No. 2, Feb. 1996, pps. 169-178.
Lee, “Reconfigurable Data Converter As A Building Block For Mixed-Signal Test”, IEEE, 1997, pps. 359-363, Mar. 17-20, 1997.
Lee, “Reconfigurable Pipelined Data Converter Architecture”, IEEE, pps. 162-165, vol. 1, Aug. 18-21, 1996.
Jin et al., “A Digital Technique For Reducing Clock Jitter Effects In Time-Interleaved A/D Converter”, IEEE, 1999, pps. 330-333, vol. 2, May 30-Jun. 2, 1999.
Gulati et al., “A Low-Power Reconfigurable Analog-To-Digital Converter”, IEEE International Solid-State Circuits Conference, 2001, 3 pgs, Feb. 5-7, 2001.
Dyer et al., “An Analog Background Calibration Technique For Time-Interleaved Analog-To-Digital Converters”, IEEE Journal Of Solid-State Circuits, vol. 33, No. 12, Dec. 1998, pps. 1912-1919.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Systems and methods for multi-channel analog to digital... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Systems and methods for multi-channel analog to digital..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systems and methods for multi-channel analog to digital... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3488099

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.