Systems and methods for minimizing delay in a control path

Details Systems and methods for minimizing delay in a control path Systems and methods for minimizing delay in a control path

2008-04-22

2008-04-22

Nguyen, Khai M (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S100000, C341S118000, C341S144000, C330S010000, C330S20700P, C330S251000

Reexamination Certificate

active

11669305

ABSTRACT:
Systems and methods for minimizing delay in a feedback path. In one embodiment, an analog-to-digital feedback path includes an analog-to-digital converter (ADC) configured to receive and digitize an analog signal such as an amplifier output to produce a serial digital output. A serial interface receives and parallelizes the serial digital output to produce a parallel data words that are provided to a processing unit such as a decimator. The processing unit processes the data words to produce a digital feedback signal which can then be used to modify an input signal, such as a digital audio input to the amplifier. A delay minimization subsystem is implemented in the feedback path to monitor a delay between generation of parallel data words by the serial interface and consumption of the parallel data words by the first processing unit. The delay minimization mechanism may be implemented in multiple channels of the feedback path.

REFERENCES:
patent: 6107876 (2000-08-01), O'Brien
patent: 6344811 (2002-02-01), Melanson
patent: 6373334 (2002-04-01), Melanson
patent: 6759899 (2004-07-01), Lennartson et al.
patent: 6765436 (2004-07-01), Melanson et al.
patent: 7286009 (2007-10-01), Andersen et al.

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