Systems and methods for logic verification

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing

Reexamination Certificate

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C716S103000, C703S015000

Reexamination Certificate

active

07934179

ABSTRACT:
Methods and systems for simulating logic may translate logic design into executable code for a multi-processor based parallel logic simulation device. A system may implement one or more parallel execution methods, which may include IPMD, MPMD, and/or DDMT.

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patent: 2007/0101318 (2007-05-01), Tatsuoka et al.

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