Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control
Reexamination Certificate
2000-03-27
2002-06-11
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Rectangular or pulse waveform width control
Reexamination Certificate
active
06404251
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to pulse-width modulation systems. More specifically, this invention relates to linear pulse width modulation systems that provide a pulse-width modulated (PWM) signal that has a duty cycle from 0-100% that varies linearly with a control voltage signal.
A pulse-width modulator is a circuit that generates a PWM signal from a DC control voltage and a periodic analog waveform such as a triangular waveform. A previously known pulse width modulator
10
is shown in FIG.
1
. Pulse-width modulator
10
comprises comparator
14
that compares a control voltage V
C
at its non-inverting input to periodic analog waveform signal V
W
generated by waveform generator
12
at its inverting input to generate PWM signal V
PWM
. The comparator provides V
PWM
that alternates between LOW (e.g., 0 volts) and HIGH (e.g., 5 volts) in response to the voltage difference between the inverting and non-inverting inputs.
A PWM signal is a periodic signal that has an amplitude that alternates between LOW and HIGH, and has a duty cycle of between 0-100%. The period of V
PWM
is set by the period of V
W
. The duty cycle of V
PWM
is typically defined as the percentage of time that V
PWM
is HIGH during its period. The duty cycle of V
PWM
is set by the value of V
C
, and varies based on changes in V
C
.
Many applications require pulse-width modulators that provide a PWM signal having a duty cycle that varies linearly with the control voltage over the entire range of duty cycles from 0% to
100
%. The duty cycle of the PWM signal may vary non-linearly with V
C
when the output signal of the comparator in the pulse-width modulator has varying propagation delays. The propagation delay of comparator
14
is the time required for its output signal (V
PWM
) to reach the midpoint between the LOW and HIGH values from the time when the voltage difference between the non-inverting and inverting inputs passes through zero. There are two distinct propagation delays: t
PLH
is the propagation delay when V
PWM
transitions from LOW to HIGH, and t
PHL
is the propagation delay when V
PWM
transitions from HIGH to LOW.
Example of signals V
W
, V
C
, and V
PWM
for circuit
10
are shown in
FIG. 2. V
W
varies between V
MAX
and V
MIN
, and V
PWM
has two states (HIGH and LOW). Ideally, V
PWM
is HIGH when V
C
>V
W
, and V
PWM
is LOW when V
C
<V
W
. In reality, however, comparator
14
has non-zero propagation delays t
PHL
20
and t
PLH
22
. In particular, t
PHL
20
is the difference between the time when V
W
crosses from just below to just above V
C
and the time when V
PWM
reaches the midpoint between HIGH and LOW, and t
PLH
22
is the difference between the time when V
W
crosses from just above to just below V
C
and the time when V
PWM
reaches the midpoint between LOW and HIGH.
Propagation delays t
PHL
and t
PLH
may vary as V
C
varies between V
MAX
and V
MIN
due to variations in the overdrive (i.e., the magnitude of the difference between the voltages at the non-inverting and inverting inputs of the comparator), and the finite slew rate of the comparator's internal nodes. For example, t
PLH
increases and t
PHL
decreases as V
C
approaches V
MIN
, and t
PLH
decreases and t
PHL
increases as V
C
approaches V
MAX
.
FIG. 3
is a graph of the duty cycle of signal V
PWM
of circuit
10
where V
W
is a symmetrical triangular periodic waveform signal. The peak-to-peak amplitude of V
W
is its maximum voltage V
MAX
minus its minimum voltage V
MIN
. Control voltage V
C
varies between V
MAX
and V
MIN
causing the duty cycle of V
PWM
to vary between 100% and 0%. Variations in propagation delays t
PHL
and t
PLH
of comparator
14
cause non-linearity
38
in V
PWM
near 100% duty cycle when V
C
is near V
MAX
(e.g. when V
C
is greater than 80% of the peak-to-peak amplitude of V
W
), and non-linearity
39
in V
PWM
near 0% duty cycle when V
C
is near V
MIN
(e.g. when V
C
is less than 20% of the peak-to-peak amplitude of V
W
). Non-linearities in V
PWM
near 100% and 0% duty cycles also exist in pulse-width modulators that use asymmetrical sawtooth periodic waveforms.
A high speed comparator may be used to achieve a more linear relationship between V
C
and the duty cycle of V
PWM
. The duty cycle of the PWM signal output of a high speed comparator used in a pulse-width modulator is able to approach closer to 0% and 100% before propagation delay variations cause non-linearities in the relationship between V
C
and V
PWM
. High speed comparators, however, typically require significantly more power and more complex circuitry than a standard comparator.
It would, however, be desirable to provide a pulse width modulator that has substantially constant propagation delays over a full range of duty cycles without significantly added power consumption and complex circuitry.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a pulse width modulator that has substantially constant propagation delays over a full range of duty cycles without significantly added power consumption and complex circuitry.
These and other objects of the present invention are provided by a pulse width modulator that includes a plurality of comparators, a multiplexer, and at least one waveform generator that generates a plurality of periodic waveform signals. Each of the plurality of comparators monitors control voltage V
C
and compares it to one of the periodic waveform signals. Each of the periodic waveform signals is time delayed with respect to the other waveform signals.
The outputs of the comparators are coupled to inputs of the multiplexer. The multiplexer selects the output signal of one of the comparators to be the PWM signal when the periodic waveform signal input to that comparator is not near its maximum or minimum voltage. During this time interval, transitions in the output signal of the selected comparator have substantially constant propagation delays.
Because each periodic waveform is time delayed with respect to the other periodic waveforms, the output of only one comparator is selected as the PWM signal during each cycle of the PWM signal. By using multiple comparators and periodic waveforms, the multiplexer is able to “stitch together” a composite PWM signal that uses the output signal of each comparator only when that comparator has substantially constant propagation delays. Low speed, low power comparators may be used in the present invention to achieve a PWM signal with a duty cycle that varies linearly with the control voltage over a full range of duty cycles. The present invention also provides methods for generating a PWM signal with a duty cycle that varies linearly with the control voltage over a full range of duty cycles.
REFERENCES:
patent: 4404481 (1983-09-01), Ide et al.
patent: 5990753 (1999-11-01), Danstrom et al.
patent: 6078208 (2000-06-01), Nolan et al.
patent: 1253670 (1971-11-01), None
Barcelo Trevor W.
Dwelley David M.
Fish & Neave
Linear Technology Corporation
Morris Robert W.
Roddy Kevin T.
Wells Kenneth B.
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