Systems and methods for equalization of received signals in...

Details Systems and methods for equalization of received signals in... Systems and methods for equalization of received signals in...

2007-08-14

2007-08-14

Payne, David C. (Department: 2611)

Pulse or digital communications

Equalizers

Automatic

Reexamination Certificate

active

10948634

ABSTRACT:
An equalizer comprises a hard decision block which feeds an FEC block and a shift register, which uses past estimates during a first iteration. The output of the FEC block is fed back to the shift register during a subsequent iteration to fully remove any inter chip interference.

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