Systems and methods for enabling ESD protection on 3-D...

Details Systems and methods for enabling ESD protection on 3-D... Systems and methods for enabling ESD protection on 3-D...

2008-09-09

2011-12-20

Bryant, Kiesha (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

With groove to define plural diodes

C257SE23174, C438S455000

Reexamination Certificate

active

08080862

ABSTRACT:
An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD events. In one embodiment, an ESD diode is created in a vertical TSV between active layers of the semiconductor dies of a stacked device. This ESD diode can be shared by circuitry on both semiconductor dies of the stack thereby saving space and reducing die area required by ESD protection circuitry.

REFERENCES:
patent: 3576549 (1971-04-01), Hess et al.
patent: 5703747 (1997-12-01), Voldman
patent: 5807791 (1998-09-01), Bertin
patent: 7061066 (2006-06-01), Kocon
patent: 2002/0115260 (2002-08-01), Halahan
patent: 2006/0001174 (2006-01-01), Matsui
patent: 2007/0029646 (2007-02-01), Voldman
International Search Report-PCT/US2009/055620, International Search Authority-European Patent Office Nov. 30, 2009.
Written Opinion-PCT/US2009/055620, International Search Authority-European Patent Office Nov. 30, 2009.

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