Systems and methods for discrete channel decoding of LDPC...

Details Systems and methods for discrete channel decoding of LDPC... Systems and methods for discrete channel decoding of LDPC...

2007-12-14

2010-02-02

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185250, C365S154000, C365S156000

Reexamination Certificate

active

07656707

ABSTRACT:
Embodiments include systems and methods for soft encoding and decoding of data for flash memories using Log-Likelihood Ratios (LLRs). The LLRs are computed from statistics determined by observation of flash memory over time. In some embodiments, the write, retention and read transition probabilities are computed based on the observed statistics. These probabilities are used to compute the LLRs. During a read operation, a device reads the voltage of a cell of the flash memory. The level of the output is determined from the voltage. The level determines which LLRs to compute and transmit to a soft decoder.

REFERENCES:
patent: 7388781 (2008-06-01), Litsyn et al.
patent: 2007/0237006 (2007-10-01), Murin et al.

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