Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-04-03
2001-10-23
Vincent, David R. (Department: 2661)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S389000
Reexamination Certificate
active
06307860
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable.
BACKGROUND OF THE INVENTION
The present invention relates to data processing, and more particularly to data transformations when data are transferred in networks.
It may be desirable to transform data when data are transferred in networks. For example, a router may replace physical addresses (MAC-layer addresses) in a data packet before transmission. An ATM switch may replace cell headers. Further, a router, a bridge, or some other device that transfers data between networks may perform protocol related transformations if the network on which the data are received and the network on which the data are transmitted use different protocols. See, for example, PCT publication WO 95/20282 (Jul. 27, 1995) incorporated herein by reference.
Such transformations can place a heavy burden on a network processor controlling the device. In addition, the processor may have to perform address resolution searches, screen out traffic that violates restrictions imposed for security reasons or in order to reduce congestion, and doing administrative work. Therefore, the processor performance is an important factor in achieving a high throughput in data transfers in networks.
To achieve high performance, some network processors are implemented as dedicated processors optimized for the specific tasks they have to perform in specific systems. These processors are sometimes hardwired for the specific tasks, protocols and standards. While these processors are fast, they have a disadvantage that they are not easily adaptable to a wide range of tasks, protocols, and standards. Therefore, such processors have limited applicability.
There also exist more intelligent processors adaptable to a wide range of systems having different tasks, protocols and standards. Examples are software programmable processors. However, the higher intelligence often comes at the cost of performance. In particular, software programmable processors can be considerably slower than their hardwired counterparts.
To combine high throughput with adaptability some devices use multiple software programmable processors. However, multiple software programmable processors can make the device expensive.
There is therefore a need for an inexpensive, adaptable, high-throughput processor arrangement.
SUMMARY
The above goals are achieved in some embodiments of the present invention by providing a network processor system which includes at least two processors, a “first” processor and a “second” processor. The first processor determines how data are to be transformed for transmission. The second processor transforms the data at commands from the first processor. For example, in some embodiments, the first processor performs address resolution and determines the new addresses to be inserted into the data. The first processor commands the second processor to transform the data by insertion of the new addresses.
In some embodiments, the first processor is an intelligent processor easily adaptable to different systems. For example, the first processor can be software programmable. Hence, in some embodiments the first processor is slow. However, high throughput is achieved because the first processor is relieved by the second processor from performing data transformations. Further, the second processor can be fast and inexpensive because the second processor does not need much intelligence. Much intelligence is not needed because the second processor transforms data at commands from the first processor and because very few simple types of commands can satisfy requirements of a wide range of tasks, protocols, and standards. In particular, some embodiments include commands such as:
(1) transmit a number of bytes of received data, perhaps skipping some data (the capability to skip data is used to skip an address that has to be replaced, or to skip a checksum, or for other protocol transformations);
(2) transmit data specified in the command, for example, immediate data included in the command or data stored at an address included in the command (this is used to insert a new address or for other transformations).
These simple commands do not require the second processor to possess intelligence to understand data or packet formats or protocols. Therefore, the second processor can be made fast, simple and inexpensive.
Because the second processor can be inexpensive, the entire network processor system can be inexpensive compared to devices with multiple software programmable processors.
In some embodiments the second processor does not transmit data to a network but rather transmits the data to a MAC, an ATM switch or SAR (segmentation and reassembly) device, or some other network device. The network device may transmit the data to a network.
Other embodiments and variations are described below. The invention is defined by the appended claims.
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Joffe Alexander
Vyshetsky Dmitry
MMC Networks, Inc.
Shenker Michael
Skjerven Morrill & MacPherson LLP
Vincent David R.
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