Coded data generation or conversion – Sample and hold – Having variable sampling rate
Reexamination Certificate
2005-05-24
2008-11-25
Jeanglaude, Jean B (Department: 2819)
Coded data generation or conversion
Sample and hold
Having variable sampling rate
C712S032000
Reexamination Certificate
active
07456765
ABSTRACT:
A system for determining a data converter clock operating mode includes measurement circuitry which measures a master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency, the frequency ratio, and a characteristic of an additional data clock signal to an operating mode of the data converter. In another embodiment, the mapping system maps measurements of the master clock frequency alone to a data converter operating mode. In a further embodiment, the measurement circuitry measures the master clock frequency of a master clock signal, which is received directly from a master clock signal source without a modification in the master clock frequency.
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Duewer Bruce Eliot
Melanson John Laurence
Nanda Kartik
Cirrus Logic Inc.
Jeanglaude Jean B
Lauture Joseph
Murphy James J.
Thompson & Knight LLP
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