Coded data generation or conversion – Sample and hold – Having variable sampling rate
Reexamination Certificate
2007-10-23
2007-10-23
Nguyen, Linh (Department: 2819)
Coded data generation or conversion
Sample and hold
Having variable sampling rate
C341S122000
Reexamination Certificate
active
11136215
ABSTRACT:
A system for determining a data converter operating mode includes measurement circuitry for measuring master clock frequency of a master clock signal and a frequency ratio between a frequency of a data clock signal and the master clock frequency and a mapping system for mapping the measurement of the frequency ratio to an operating mode of the data converter. The mapping system generates a set of candidate divide ratios for dividing the master clock frequency to generate corresponding internal master clock frequencies of an internal clock signal and determines the lowest divide ratio which generates a supported internal master clock frequency. In an alternate embodiment, the mapping system determines the divide ratio required by a filter of the data converter by dividing the data clock to master clock frequency ratio by a data clock to internal clock frequency ratio between the data clock frequency and the frequency of an internal clock signal. In additional embodiments, the mapping system gives preference to natural number divide ratios during mode mapping.
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Duewer Bruce Eliot
Melanson John Laurence
Nanda Kartik
Cirrus Logic Inc.
Murphy James J.
Nguyen Linh
Thompson & Knight LLP
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