Systems and methods for clock mode determination utilizing...

Coded data generation or conversion – Sample and hold – Having variable sampling rate

Reexamination Certificate

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C704S212000

Reexamination Certificate

active

07057539

ABSTRACT:
A system for determining a data converter operating mode includes measurement circuitry operable to measure a master clock frequency of a master clock signal and measure a frequency ratio between a data clock frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter utilizing an explicit formula. In a further embodiment, the mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter utilizing a lookup table. In an additional embodiment, the mapping system tests an available set of operating modes, independent of any previous tests, to determine a suitable operating mode for the data converter.

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patent: 6492928 (2002-12-01), Rhode et al.
patent: 6556157 (2003-04-01), Itani et al.
patent: 6667704 (2003-12-01), Grale et al.
patent: 2002/0039888 (2002-04-01), Hama
patent: 2004/0160988 (2004-08-01), Boehlke et al.
patent: 2005/0010399 (2005-01-01), Duewer
patent: 2005/0078783 (2005-04-01), Okita

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