Systems and methods for assessing timing of PCI signals

Details Systems and methods for assessing timing of PCI signals Systems and methods for assessing timing of PCI signals

2007-10-30

2007-10-30

Barlow, John (Department: 2863)

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

Reexamination Certificate

active

10743957

ABSTRACT:
Methods and systems assess timing of PCI signals. A test mode is initiated within a host adapter board. A clock signal is generated for the host adapter board. PCI signals are generated within the host adapter board. One or more PCI signal lines of the host adapter board are electronically selected; and timing (e.g., slew rate and/or clock-to-signal valid) of the one or more PCI signal lines is assessed.

REFERENCES:
patent: 5778194 (1998-07-01), McCombs
patent: 6516366 (2003-02-01), Gates et al.
PCI Express Development Solutions Catalog, by Catalyst Enterprises, Inc., Copyright 2003, 16 pages.

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