Systems and methods for accessing multi-port memories

Details Systems and methods for accessing multi-port memories Systems and methods for accessing multi-port memories

1995-06-06

1996-12-17

Gossage, Glenn

395496, 395494, 395478, 395845, 395290, G06F 1300, G06F 1314

Patent

active

055862993

ABSTRACT:
An arbitration circuit receives access request signals from ports of a multi-port memory, and generates access grant signals. For one of the ports, the corresponding access request signal is a function of: 1) a signal indicative of a non-negative number N1 such that, at a predetermined time (e.g., at the beginning of a current clock period), a circuit accessing the memory through the port is ready for N1 data words to be transferred through the port, and 2) a signal indicative of whether one or more accesses were already granted to the port to transfer data after the predetermined time (e.g., during the current clock period and the next clock period). In some embodiments, data are read through the port to a pipeline; the number N1 is the number of data word locations in the pipeline that are available to store new data words to be read from the memory. In some embodiments, data are written to the memory from the pipeline; the number N1 is the number of data words held in the pipeline.

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