Systems and devices including memory resistant to program...

Static information storage and retrieval – Floating gate – Disturbance control

Reexamination Certificate

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C365S185170, C365S185230, C365S185240, C365S185250

Reexamination Certificate

active

07965548

ABSTRACT:
Disclosed are methods, systems and devices, one such device being a memory device configured to concurrently assert a first pulse pattern through a plurality of conductors disposed on both a source side and a drain side of a floating-gate transistor, wherein a source side of the first pulse pattern has a different median voltage than a drain side of the first pulse pattern.

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