Systematic memory location selection in Ethernet switches

Details Systematic memory location selection in Ethernet switches Systematic memory location selection in Ethernet switches

2007-01-09

2007-01-09

Coulter, Kenneth R. (Department: 2141)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S395700, C370S412000

Reexamination Certificate

active

10014007

ABSTRACT:
A switch and a process of operating a switch are described where a received data frame is stored into memory in a systematic way. In other words, a location is selected in the memory to store the received data frame using a non-random method. By storing the received data frame in this way, switches that employ this system and method increase bandwidth by avoiding delays incurred in randomly guessing at vacant spaces in the memory. The received data frame is stored until a port that is to transmit the received data frame is available. Throughput is further improved by allowing the received data frames to be stored in either contiguous or non-contiguous memory locations.

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