System with PPU/GPU architecture

Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression

Reexamination Certificate

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Details

C703S006000, C706S010000, C708S446000, C709S217000, C709S218000, C709S236000, C709S238000

Reexamination Certificate

active

07620530

ABSTRACT:
A PPU-enhanced computer system is provided including a Physics Processing Unit (PPU), a Graphics Processing Unit (GPU), a Central Processing Unit (CPU) and a main memory, wherein the system creates an animation from application data stored in the main memory by data communication between the GPU, PPU, CPU and main memory. The system may include a memory controller and a chip set connecting the bus structure to the CPU and GPU through an I/O interface and connecting the PPU though a bus structure. The PPU may be a separate processing core logically grouped with the CPU and GPU processing cores. In this preferred embodiment, the CPU, GPU and PPU receive data from a common L2 cache and/or a main system memory.

REFERENCES:
patent: 4116444 (1978-09-01), Mayer et al.
patent: 4209832 (1980-06-01), Gilham et al.
patent: 4824106 (1989-04-01), Ueda et al.
patent: 4862156 (1989-08-01), Westberg et al.
patent: 4871167 (1989-10-01), Pasierb, Jr.
patent: 4905147 (1990-02-01), Logg
patent: 4905168 (1990-02-01), McCarthy et al.
patent: 5187796 (1993-02-01), Wang et al.
patent: 5224213 (1993-06-01), Dieffenderfer et al.
patent: 5308086 (1994-05-01), Ueda et al.
patent: 5425139 (1995-06-01), Williams et al.
patent: 5455902 (1995-10-01), Ellson et al.
patent: 5487172 (1996-01-01), Hyatt
patent: 5522082 (1996-05-01), Guttag et al.
patent: 5664162 (1997-09-01), Dye
patent: 5680534 (1997-10-01), Yamato et al.
patent: 5708457 (1998-01-01), Otake et al.
patent: 5721834 (1998-02-01), Milhaupt et al.
patent: 5771167 (1998-06-01), Gomi et al.
patent: 5812147 (1998-09-01), Van Hook et al.
patent: 5828369 (1998-10-01), Foster
patent: 5841444 (1998-11-01), Mun et al.
patent: 5938530 (1999-08-01), Watanabe
patent: 5966528 (1999-10-01), Wilkinson et al.
patent: 6008818 (1999-12-01), Amakawa et al.
patent: 6058465 (2000-05-01), Nguyen
patent: 6105119 (2000-08-01), Kerr et al.
patent: 6115036 (2000-09-01), Yamato et al.
patent: 6154186 (2000-11-01), Smith et al.
patent: 6240526 (2001-05-01), Petivan et al.
patent: 6298370 (2001-10-01), Tang et al.
patent: 6341318 (2002-01-01), Dakhill
patent: 6342892 (2002-01-01), Van Hook et al.
patent: 6414687 (2002-07-01), Gibson
patent: 6425822 (2002-07-01), Hayashida et al.
patent: 6514142 (2003-02-01), Hattori et al.
patent: 6553446 (2003-04-01), Miller
patent: 6570569 (2003-05-01), Tsukamoto et al.
patent: 6570571 (2003-05-01), Morozumi
patent: 6580430 (2003-06-01), Hollis et al.
patent: 6629891 (2003-10-01), Nagayama
patent: 6646653 (2003-11-01), San et al.
patent: 6714901 (2004-03-01), Cotin et al.
patent: 6782432 (2004-08-01), Nelson et al.
patent: 6917443 (2005-07-01), Wang
patent: 6966837 (2005-11-01), Best
patent: 7006085 (2006-02-01), Acosta et al.
patent: 7095416 (2006-08-01), Johns et al.
patent: 7119817 (2006-10-01), Kawakami
patent: 7120653 (2006-10-01), Alfieri et al.
patent: 7229355 (2007-06-01), San et al.
patent: 7363199 (2008-04-01), Reynolds et al.
patent: 7372463 (2008-05-01), Anand
patent: 7372472 (2008-05-01), Bordeleau et al.
patent: 7432932 (2008-10-01), San et al.
patent: 2001/0030648 (2001-10-01), Deering
patent: 2001/0040577 (2001-11-01), San et al.
patent: 2001/0043224 (2001-11-01), San et al.
patent: 2001/0055035 (2001-12-01), Kinjo
patent: 2002/0050999 (2002-05-01), San et al.
patent: 2002/0183992 (2002-12-01), Ayache et al.
patent: 2003/0032467 (2003-02-01), Mayer et al.
patent: 2003/0090484 (2003-05-01), Comair et al.
patent: 2003/0112281 (2003-06-01), Sriram et al.
patent: 2003/0177187 (2003-09-01), Levine et al.
patent: 2004/0075623 (2004-04-01), Hartman
patent: 2004/0085321 (2004-05-01), Oka et al.
patent: 2005/0041031 (2005-02-01), Diard
patent: 2005/0071306 (2005-03-01), Kruszewski et al.
patent: 2005/0075154 (2005-04-01), Bordes et al.
patent: 2005/0075849 (2005-04-01), Maher et al.
patent: 2005/0086040 (2005-04-01), Davis et al.
patent: 2005/0165873 (2005-07-01), Zhang et al.
patent: 2005/0165874 (2005-07-01), Zhang et al.
patent: 2005/0225552 (2005-10-01), Anand
patent: 2005/0272492 (2005-12-01), Stelly, III
patent: 2006/0030383 (2006-02-01), Rosenberg et al.
patent: 2006/0092175 (2006-05-01), Mech
patent: 2006/0100835 (2006-05-01), Bordes et al.
patent: 2006/0149516 (2006-07-01), Bond et al.
patent: 2007/0030276 (2007-02-01), MacLnnis et al.
patent: 2007/0035543 (2007-02-01), David et al.
patent: 2007/0057943 (2007-03-01), Beda et al.
patent: 2007/0071312 (2007-03-01), Gardella et al.
patent: 2008/0049030 (2008-02-01), Kaslin
patent: 2008/0055321 (2008-03-01), Koduri
patent: 2008/0074425 (2008-03-01), Ohba et al.
patent: 2008/0100627 (2008-05-01), Nystad et al.

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