System with modules using priority numbers related to interrupt

Details System with modules using priority numbers related to interrupt System with modules using priority numbers related to interrupt

1992-04-06

1993-05-18

Lee, Thomas C.

Boots, shoes, and leggings

3642302, 364241, 3642412, 3642415, 3642426, 3642428, 3642429, 364DIG1, 3649354, 36493541, 3649401, 3649413, G06F 1314

Patent

active

052127966

ABSTRACT:
In a microcomputer including a CPU and a plurality of modules operatively connected through a main bus including address and data lines, a method of interrupting an operation including providing an interrupt request line and an arbitration bus, and arbitrating between modules and with the CPU on the arbitration bus so that no use of the main bus for arbitration or an interrupt acknowledge are required and the CPU can continue the operation as the arbitration proceeds.

REFERENCES:
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patent: 4495569 (1985-01-01), Kagawa
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patent: 4631669 (1986-12-01), Horikawa
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patent: 4794516 (1988-12-01), Auerbach et al.
patent: 5034881 (1991-07-01), Hoashi et al.
patent: 5067071 (1991-11-01), Schamin et al.
patent: 5109513 (1992-04-01), Otsuka
Motorola's user's manual, M68000 8-/16-/32-bit up, Sixth Edition published by Prentice Hall, 1989.

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