Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2010-10-05
2011-11-22
Dinh, Son (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S185180, C365S185290
Reexamination Certificate
active
08064238
ABSTRACT:
Interface circuitry in communication with at least one non-volatile resistivity-sensitive memory is disclosed. The memory includes a plurality of non-volatile memory elements that may have two-terminals, are operative to store data as a plurality of conductivity profiles that can be determined by applying a read voltage across the memory element, and retain stored data in the absence of power. A plurality of the memory elements can be arranged in a cross-point array configuration. The interface circuitry electrically communicates with a system configured for memory types, such as DRAM, SRAM, and FLASH, for example, and is operative to communicate with the non-volatile resistivity-sensitive memory to emulate one or more of those memory types. The interface circuitry can be fabricated in a logic plane on a substrate with at least one non-volatile resistivity-sensitive memory vertically positioned over the logic plane. The non-volatile resistivity-sensitive memories may be vertically stacked upon one another.
REFERENCES:
patent: 3648254 (1972-03-01), Beausoleil
patent: 6191614 (2001-02-01), Schultz et al.
patent: 6429682 (2002-08-01), Schultz et al.
Dinh Son
Unity Semiconductor Corporation
LandOfFree
System using non-volatile resistivity-sensitive memory for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System using non-volatile resistivity-sensitive memory for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System using non-volatile resistivity-sensitive memory for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4259668