System to improve trapping of I/O instructions in a peripheral c

Details System to improve trapping of I/O instructions in a peripheral c System to improve trapping of I/O instructions in a peripheral c

1996-08-28

1999-05-11

An, Meng-Ai T.

395838, 395837, 39575006, G06F11/30

Patent

active

059037733

ABSTRACT:
A system for trapping I/O instructions. The system is comprised of at least one peripheral controller for receiving a plurality of I/O instructions and for initiating trapping of an un-executable I/O instruction by issuing a target abort signal when the peripheral controller senses a power off condition in a peripheral device. A system controller is coupled to the at least one peripheral controller for receiving the target abort signal from the at least one peripheral controller and for sequentially: issuing a system management interrupt (SMI) signal; counting a predetermined time period to allow recognition of the SMI signal; and issuing a cycle completion signal after counting the predetermined time period. A CPU is coupled to the system controller for issuing a plurality of I/O instructions and for receiving the SMI signal and the cycle completion signal from the system controller.

REFERENCES:
patent: 5566351 (1996-10-01), Crittenden et al.
patent: 5628029 (1997-05-01), Evoy
patent: 5638514 (1997-06-01), Yoshida et al.
patent: 5649212 (1997-07-01), Kawamura et al.
patent: 5655127 (1997-08-01), Rabe et al.

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