Excavating
Patent
1997-07-30
1998-07-14
Beausoliel, Jr., Robert W.
Excavating
G01R 3128
Patent
active
057815607
ABSTRACT:
A method and system testing device for testing a printed circuit board includes a JTAG circuit provided with a JTAG instruction storage unit for storing a command to control a system logic circuit; and a JTAG data storage unit for storing data used to control the system logic circuit. The system testing device tests the system logic circuit in an LSI by selectively inputting/outputting data to a boundary scan register, a bypass register, the JTAG instruction storage unit, and the JTAG data storage unit.
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IEEE STD 1149. Jan. 1990, "IEEE Standard Test Access Port and Boundary-Scan Architecture", pp. 1-1, 1990.
Hara Kazuhiro
Kawano Kayoko
Sutou Shinichi
Takaki Yasushi
Beausoliel, Jr. Robert W.
Elmore Stephen C.
Fujitsu Limited
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