System-on-chip (SOC), design structure and method

Details System-on-chip (SOC), design structure and method System-on-chip (SOC), design structure and method

2011-03-08

2011-03-08

Lin, Sun J (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

System-on-chip design

C716S100000

Reexamination Certificate

active

07904873

ABSTRACT:
Disclosed is a system-on-chip (SOC) structure that allows for automated integration of multiple intellectual cores. The SOC structure incorporates a plurality of cells connected to a common bus on a chip. Each cell incorporates a functional core and an automated integration unit (AIU) connected to the functional core. Each AIU communicates integration information for its functional core over the common bus to the AIUs in the other cells. The exchange of information between the AIUs is controlled either by the integration units themselves or by a controller. Based on received integration information, each AIU can automatically make any required configuration adjustments for integration. Furthermore, based on this exchange of information, the functional cores can interact, as necessary, during SOC operation. Also disclosed are an associated method of forming such a SOC structure and a design structure for such an SOC structure.

REFERENCES:
patent: 5551053 (1996-08-01), Nadolski et al.
patent: 6948105 (2005-09-01), Rajsuman
patent: 2003/0145290 (2003-07-01), Devins et al.
patent: 2009/0292828 (2009-11-01), Ebbers et al.
Ebbers et al., U.S. Appl. No. 12/125,255, Office Action Communication, Sep. 9, 2010, 5 pages.

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