System of DAC correction for a &Dgr;&Sgr; modulator

Details System of DAC correction for a &Dgr;&Sgr; modulator System of DAC correction for a &Dgr;&Sgr; modulator

2001-06-20

2003-02-18

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S144000, C341S155000

Reexamination Certificate

active

06522276

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to &Dgr;&Sgr; modulation, and more particularly to taking account of and correcting the imperfections of an internal digital to analog converter in the &Dgr;&Sgr; modulator.
2. Description of the Related Art
&Dgr;&Sgr; modulators perform analog to digital (A/D) or digital to analog (D/A) conversion at high bit resolution by means of low resolution internal A/D converters (ADCs) or D/A converters (DACs), typically converters having resolution of 1 to 4 bits.
This is made possible in particular by oversampling the analogue signal and by shaping quantization noise.
In general, &Dgr;&Sgr; modulators comprise a DAC which is generally a 1-bit DAC, e.g. in a negative feedback branch.
Such a 1-bit DAC has only two output levels (+Vref and −Vref) and they are capable of being interconnected by a straight line (the DAC is intrinsically linear).
Each time it compares the signal on its input with a reference voltage Vref, this quantizing DAC associates the input level with a voltage +Vref or a voltage −Vref.
Proposals have been made to replace the 1-bit DAC with a multibit DAC, but the performance of multibit &Dgr;&Sgr; modulators turns out to be limited by a lack of precision in the internal DAC.
Beyond one bit, the disparity between output levels will give rise to non linearity in the DAC, i.e. to non-proportionality between the input and the output of the DAC, thus limiting the performance of the DAC. This disparity is due to inaccuracy concerning the individual components used, e.g. concerning the capacitances of the various capacitors if the &Dgr;&Sgr; modulator has switched capacitors integrated on silicon.
For example, if it is desired to obtain a 16-bit A/D converter using a multibit &Dgr;&Sgr; modulator, that means the linearity of its internal DAC must be at least 16 bits.
Achieving acceptable performance for a multibit DAC requires implementation techniques that are complex and expensive (laser adjustment, component matching), thus destroying the advantage of &Dgr;&Sgr; modulation which was initially supposed to obtain high-performance using components that are of little complexity, thus enabling them to be integrated very easily on silicon.
Systems and algorithms have been proposed for correcting the imperfections of D/A converter components, as have systems for enabling such components to be calibrated automatically. Nevertheless, the only systems they have made possible are limited in operating speed and in resolution.
Thus, in an article by Groeneveld, et al., entitled “A Self-Calibration Technique for Monolithic High-Resolution D/A Converters”, Journal of Solid-State Circuits, vol. 24, No. 6, pp. 1517-1522 (1989), a D/A converter is proposed having a plurality of current sources, each supplying either a constant current at a value that is accurately fixed, or else no current, with the value of the digital input determining the number of sources that are activated.
That document proposes using one source additional to the number of sources necessary for conversion.
Thus, each of the sources is successively taken out of the conversion process in order to be calibrated on a preset current value. The number of sources in activity is thus always sufficient, and there is also one source that is being calibrated.
The method described in that document suffers from the drawback of having calibration time that depends on the technology used. By using individual components restricted to current sources, power consumption and surface area requirements for integration on silicon remain relatively large.
For a D/A converter internal to the &Dgr;&Sgr; modulator, an article by Sarhand-Nejad et al., entitled “A High-Resolution Multibit &Dgr;&Sgr; ADC with Digital Correction and Relaxed Amplifier Requirements”, Journal of Solid-State Circuits, vol. 28, No. 6, pp 648-660 (1993), proposes a method of correcting conversion parameter errors that consists in applying correction vectors in the digital domain.
In that method, faults associated with inaccuracies concerning the elements of the D/A converter are measured during a calibration stage that requires the converter to be stopped.
The errors are measured for each of the capacitor charge state combinations, i.e. for 16 possible combinations. Thereafter, the error vector as determined in this way is applied in the digital domain.
Because it requires conversion to be stopped in order to determine the error vector, that method is difficult to adapt to converters that are required to operate continuously. Because it does not provide continuous adaptation of the error vector, it is particularly sensitive to the changes in parameter values that occur while conversion is taking place, where such changes are of a kind that is to be encountered in converters of that type.
The invention seeks to propose a multibit D/A or A/D &Dgr;&Sgr; modulator suitable for taking account of errors in the operating parameters of the individual components of the internal D/A converter while it is in the process of performing conversion, and for correcting such errors automatically.
According to the invention, this object is achieved by a &Dgr;&Sgr; modulator including means for measuring an error due to differences in the operating parameters of individual components of its internal D/A converter, and means for applying a correction of the error measured in this way to a digital signal, the modulator being characterized in that the internal converter comprises a number of individual components greater than the number necessary for internal conversion, and in that the measurement means are suitable for extracting in alternation from the internal conversion process, on each occasion a different component from the various individual components in order to measure the operating parameter error of the extracted component, while leaving a number of components in action that is sufficient for internal conversion.


REFERENCES:
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patent: 5781138 (1998-07-01), Knudsen
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patent: 0 964 524 (1999-12-01), None
Groeneveld et al., “A Self-Calibration Technique for Monolithic High-Resolution D/A Converters”, Journal of Solid-State Circuits, vol. 24, No. 6, pp. 1517-1522, 1989 (No month).
Sarhang-Nejad et al., “A High-Resolution Multibit &Sgr;&Dgr; ADC with Digital Correction and Relaxed Amplifier Requirements”, (no month) Journal of Solid-State Circuits, vol. 28, No. 6, pp. 648-660 1993.
Cataltepe et al., “Digitally Corrected Multi-Bit &Sgr;&Dgr; Data Converters”, ISCAS'89, pp. 647-650, 1989 (no month).
Baird et al., “A Low Oversampling Ration 14-b 500-kHz &Dgr;&Sgr; ADC with a Self-Calibrated Multibit DAC”, IEEE Journal of Solid-State Circuits, vol. 31, No. 3, 1996 (no month).

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