System, method, and apparatus for variable length decoder

Coded data generation or conversion – Digital code to digital code converters – To or from variable length codes

Reexamination Certificate

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C341S050000, C341S051000

Reexamination Certificate

active

06867715

ABSTRACT:
A system method, and apparatus for decoding a bitstream comprising variable length coded symbols are presented herein. The bitstream is parsed and the symbols that are decoded are extracted from the bitstream. The symbols that are not decoded in the parse are stored in a register. When the register is full, the contents therein are stored in the next available data word in the memory. In the foregoing manner, the bitstream without the decoded symbols is stored continuously in memory, even where the width of the memory is substantially wider than the variable length symbols.

REFERENCES:
patent: 5394144 (1995-02-01), Kim
patent: 5821887 (1998-10-01), Zhu
patent: 5870039 (1999-02-01), Imanishi et al.
patent: 20030043156 (2003-03-01), Macy et al.
patent: 20030169815 (2003-09-01), Aggarwal et al.

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