Computer graphics processing and selective visual display system – Computer graphics processing – Three-dimension
Reexamination Certificate
2001-08-23
2004-07-13
Jankus, Almis R. (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphics processing
Three-dimension
Reexamination Certificate
active
06762758
ABSTRACT:
BACKGROUND
1. Reservation of Copyright
The disclosure of this patent document contains material that is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document, or the patent disclosure as it appears in the U.S. Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
2. Field of the Invention
This invention relates to video graphics processing.
3. Description of Related Art
Computers are used in many representational and interactive applications. As computing systems continue to evolve, their graphical display requirements become more stringent. These requirements are especially demanding in the field of three-dimensional (3D) video graphics processing. In 3D images, the positions of the graphics primitives (e.g. elemental polygons) with respect to the display plane include the spatial dimension of depth, also referred to as the Z-dimension. The Z-dimension describes the positioning of a primitive with respect to other objects within a display frame in terms of depth, or distance from the viewer. As such, objects may be drawn in front of or behind one another in overlapping fashion.
Computer displays and other high-resolution display devices, such as high-definition televisions (HDTVs), projectors, printers, and the like, present an image to the viewer as an array of individual picture elements, or pixels. Each pixel has a specific color value that corresponds to the color of the image at the location of the pixel. The pixels are closely spaced, and a viewer's visual system performs a filtering of the individual pixel colors to form a composite image. If an image is properly partitioned into individual pixels, and the pixels are sufficiently close together, the viewer perceives the displayed array of pixels as a virtually continuous image.
In order to present a smooth and continuous image on a display, the entity processing the video graphics images must maintain a high rate of pixel processing. As such, pixel data stored in display memory must be retrieved, processed, and then stored back into the display memory in an efficient manner. A large amount of memory bandwidth is required because as new fragments (e.g. representing color and depth values of new objects) are received, pixels stored in a display frame must be retrieved so that the new information may be incorporated into them to generate an updated image. The resulting set of information for each altered pixel must then be stored back into the display memory.
As the resolution (i.e. the number of pixels in a designated area of the display) increases, the memory bandwidth required to maintain the displayed image also increases. Faster memories or multiple parallel memories may be implemented to meet these increased bandwidth requirements. However, such strategies are more expensive from both design and manufacturing standpoints. Further, precious silicon area is consumed, thus reducing yield and limiting the functionality and performance of graphics chips.
Therefore, what is needed is a method for reducing the memory bandwidth requirements in 3D video graphics systems.
SUMMARY OF THE INVENTION
In a method for data compression according to an embodiment of the present invention, at least one reference value is obtained from a block of input values, along with a set of offset values for each reference value. A compressed block includes the offset values, each of which corresponds to one of the input values and indicates a distance between the input value and the reference value with which the offset value is associated. If more than one reference value is used, the compressed block may also include flags to indicate associations between offset values and corresponding reference values.
REFERENCES:
patent: 5808618 (1998-09-01), Kawano et al.
patent: 5819017 (1998-10-01), Akeley et al.
patent: 6037946 (2000-03-01), Takeda
patent: 6104837 (2000-08-01), Walker
Morein Stephen L.
Natale Mark A.
ATI Technologies Inc.
Jankus Almis R.
Pillsbury & Winthrop LLP
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