System, method and apparatus for an instruction driven...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C375S240250, C348S699000

Reexamination Certificate

active

06947485

ABSTRACT:
The present invention provides a system, method and an apparatus for a digital video processor comprising an error memory and a merge memory, a half pixel filter communicably coupled to the merge memory, a controller communicably coupled to the error memory, the merge memory and the half pixel filter. The present invention also including a sum unit communicably coupled to the error memory. The controller executing one or more instructions to provide motion compensation during video decoding.

REFERENCES:
patent: 5329318 (1994-07-01), Keith
patent: 5363139 (1994-11-01), Keith
patent: 5386233 (1995-01-01), Keith
patent: 5461679 (1995-10-01), Normile et al.
patent: 5598514 (1997-01-01), Purcell et al.
patent: 5604540 (1997-02-01), Howe
patent: 5774206 (1998-06-01), Wasserman et al.
patent: 5781664 (1998-07-01), Bheda et al.
patent: 5812791 (1998-09-01), Wasserman et al.
patent: 5903312 (1999-05-01), Malladi et al.
patent: 5920353 (1999-07-01), Diaz et al.
patent: 5990958 (1999-11-01), Bheda et al.
patent: 6028635 (2000-02-01), Owen et al.
patent: 6173366 (2001-01-01), Thayer et al.
patent: 6212330 (2001-04-01), Yamamoto et al.
patent: 6414996 (2002-07-01), Owen et al.
patent: 0 572 263 (1993-12-01), None
patent: 0 572 766 (1993-12-01), None
patent: 0673171 (1995-09-01), None
patent: 0 710 027 (1996-05-01), None
patent: 0772159 (1997-05-01), None
patent: 0789495 (1997-08-01), None
patent: 0847203 (1998-06-01), None
patent: 0847204 (1998-06-01), None
patent: 0863462 (1998-09-01), None
Holmann et al, “Real-time MPEG-2 software decoding with a dual-issue RISC processor”, VLSI Signal Processing, IEEE Publication, pp. 105-114, Oct. 30th to Nov. 1, 1996.
Ogura et al, “A Cost Effective Motion Estimation Processor LSI Using A Simple And Efficient Algorithm”, IEEE Transactions on Consumer Electronics, vol. 41, No. 3, pp. 690-698, Aug. 1995.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

System, method and apparatus for an instruction driven... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System, method and apparatus for an instruction driven..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System, method and apparatus for an instruction driven... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3399143

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.