System management architecture for multi-node computer system

Electrical computers and digital processing systems: multicomput – Master/slave computer controlling

Reexamination Certificate

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Reexamination Certificate

active

07487222

ABSTRACT:
In a multi-node SMP system, at least one processor per node is enabled to execute the SMM task for the hardware resources that are local to that node. Additionally, each node is allocated its own local SMM code copy in its own SMM memory segment, to allow for improved access and a further reduction in internode traffic. In a preferred embodiment, only a signle processor per node is enabled to execute the SMM tasks, and specific SMM memory locations within the SMM memory segments are allocated and used to report status and results from each node. A root node SMM processor monitors the SMM status entries of the other nodes for completion. To further reduce run-time internode traffic, a per-node resource map is created to identify memory and I/O resources that are specific to a particular node. This per-node resource map is then stored locally within the SMM space on each node, respectively.

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