System level functional testing through one or more I/O ports of

Details System level functional testing through one or more I/O ports of System level functional testing through one or more I/O ports of

1995-08-08

1999-02-23

Beausoliel, Jr., Robert W.

Boots, shoes, and leggings

3642383, G06F 1100

Patent

active

058752935

ABSTRACT:
A test apparatus and method for fully testing the functional aspects of a computer system at the system level through one or more of its I/O ports. A test system is connected to an externally available I/O port of the computer under test for accessing its system ROM and a jumper is installed on the computer under test to disable its system ROM. The jumper also bypasses the PCMCIA controller, if necessary, to provide the test system direct access to the I/O port and thus the system ROM. The computer under test is booted from diagnostic test code stored in memory of the test system, where the diagnostic test code has complete control and performs a series of tests on the computer under test. Other I/O ports of the computer under test, including its serial ports, parallel port, keyboard and mouse ports, video port and a docking port may also be connected to the test system, if desired. Certain portions of the diagnostic test code may be downloaded into video RAM of the computer under test and executed sequentially. Also, a communication protocol may be established between the host computer and the computer under test so that the host computer can control initiation and monitor status of each test routine.

REFERENCES:
patent: 4691316 (1987-09-01), Phillips
patent: 5463766 (1995-10-01), Schieve et al.
patent: 5471674 (1995-11-01), Stewart et al.

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