Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory – Plural shared memories
Reexamination Certificate
2007-09-04
2007-09-04
Dalencourt, Yves (Department: 2157)
Electrical computers and digital processing systems: multicomput
Multicomputer data transferring via shared memory
Plural shared memories
C711S141000, C711S146000, C711S147000, C711S153000, C711S156000
Reexamination Certificate
active
10270028
ABSTRACT:
A node comprises at least an interconnect, one or more coherent agents coupled to the interconnect, and a memory bridge coupled to the interconnect. The memory bridge is configured to maintain coherency on the interconnect on behalf of other nodes. In one embodiment, the interconnect does not permit retry of a transaction initiated thereon, and the memory bridge is configured to provide a response during a response phase of the transaction based on a state of a coherency block accessed by the transaction in the other nodes. In another embodiment, the node further comprises a plurality of interface circuits and a switch. Each of the plurality of interface circuits is configured to couple to an interface to receive coherency commands from other nodes. The switch is configured to selectively couple the plurality of interface circuits to the memory bridge to transmit the coherency commands to the memory bridge.
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Broadcom Corporation
Dalencourt Yves
Garlick & Harrison & Markison
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