System having constant number of total input and output shift re

Details System having constant number of total input and output shift re System having constant number of total input and output shift re

1989-08-08

1992-12-08

Lee, Thomas C.

Boots, shoes, and leggings

395325, 364228, 3642387, 364243, 364DIG1, G06F 1300

Patent

active

051704838

ABSTRACT:
A central unit for a data-processing system having a high degree of parallelism. This central unit includes a number of basic processors sending requests to a number of modules in receiving responses from those modules. To simplify the interconnection between the modules and the processors when their number increases, the invention is characterized wherein the requests sent from each processor are transmitted to the input of each of said modules via an input shift register, wherein the response coming from each of the said modules are transmitted to the input of each processor via an output shift register, wherein for any provided processor, the number of stages of said input shift register making it possible to access the modules is different for each of the modules and wherein for any processor, the total number of stages belonging to the input and output shift registers associated with one of the said modules is constant and independent of the module and processor in question.

REFERENCES:
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patent: 4628447 (1986-12-01), Cartret et al.
patent: 4689738 (1987-08-01), van Wijk et al.
patent: 4858108 (1989-08-01), Ogawa et al.

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