System having configurable interfaces for flexible system...

Details System having configurable interfaces for flexible system... System having configurable interfaces for flexible system...

2008-07-01

2008-07-01

Pham, Chi (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S235000, C711S141000

Reexamination Certificate

active

07394823

ABSTRACT:
An apparatus includes a plurality of memories, a plurality of systems, and a switch interface circuit. Each of the plurality of systems includes a memory controller coupled to a respective one of the plurality of memories. Additionally, each of the plurality of systems is coupled to at least one other one of the plurality of systems. Each of the plurality of systems further includes one or more coherent agents configured to access the plurality of memories, and wherein the plurality of systems enforce coherency across the plurality of systems for at least some accesses. At least one of the plurality of systems is coupled to the switch interface circuit separate from the interconnection of the plurality of systems. The switch interface circuit is configured to interface the apparatus to a switch fabric.

REFERENCES:
patent: 4788679 (1988-11-01), Kataoka et al.
patent: 5623628 (1997-04-01), Brayton et al.
patent: 5644753 (1997-07-01), Ebrahim et al.
patent: 5689500 (1997-11-01), Chiussi et al.
patent: 5710907 (1998-01-01), Hagersten et al.
patent: 5805590 (1998-09-01), Gillard et al.
patent: 5878268 (1999-03-01), Hagersten
patent: 5887138 (1999-03-01), Hagersten et al.
patent: 5920226 (1999-07-01), Mimura
patent: 5925097 (1999-07-01), Gopinath et al.
patent: 5961623 (1999-10-01), James et al.
patent: 5963745 (1999-10-01), Collins et al.
patent: 6009426 (1999-12-01), Jouenne et al.
patent: 6070215 (2000-05-01), Deschepper et al.
patent: 6094715 (2000-07-01), Wilkinson et al.
patent: 6101420 (2000-08-01), Van Doren et al.
patent: 6105119 (2000-08-01), Kerr et al.
patent: 6108739 (2000-08-01), James et al.
patent: 6108752 (2000-08-01), Van Doren et al.
patent: 6128728 (2000-10-01), Dowling
patent: 6138217 (2000-10-01), Hamaguchi
patent: 6182201 (2001-01-01), Arimilli et al.
patent: 6185520 (2001-02-01), Brown et al.
patent: 6195739 (2001-02-01), Wright et al.
patent: 6202132 (2001-03-01), Islam et al.
patent: 6209065 (2001-03-01), Van Doren et al.
patent: 6219755 (2001-04-01), Klein
patent: 6249846 (2001-06-01), Van Doren et al.
patent: 6266731 (2001-07-01), Riley et al.
patent: 6298370 (2001-10-01), Tang et al.
patent: 6338122 (2002-01-01), Baumgartner et al.
patent: 6901052 (2005-05-01), Buskirk et al.
patent: 2001/0039604 (2001-11-01), Takahashi
patent: 2002/0038407 (2002-03-01), Mounes-Toussi et al.
patent: 2004/0062261 (2004-04-01), Zecharia et al.
patent: 199 07 200 (1999-02-01), None
patent: 265 636 (1986-10-01), None
patent: 893 766 (1999-01-01), None
patent: 920 157 (1999-06-01), None
patent: 936 555 (1999-08-01), None
patent: 945 805 (1999-09-01), None
patent: 777 179 (2002-05-01), None
patent: 98/15155 (1998-04-01), None
patent: WO 00/38069 (2000-06-01), None
Giorgi et al.; PSCR: A Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Shared-Memory Multiprocessors; IEEE Transactions on Parallel and Distributed Systems; vol. 10, No. 7, Jul. 1999.
“They Design and Analysis of Dash: A Scalable Directory-Based Multiprocessor,” Daniel Lenoski, Dec. 1991, A Dissertation submitted to the Dept. of Elect. Engin. And the committee on graduate studies of Stanford Univ., 176 pages.
“An Argument for Simple COMA,” Saulsbury, et al., Aug. 1, 1994, SISC Research Report No. R94:15, 20 pages.
Tom R. Halfhill, “SiByte Reveals 64-Bit Core For NPUs; Independent MIPS64 Design Combines Low Power, High Performance,” Microdesign Resources, Jun. 2000, Microprocessor Report, 4 pages.
SiByte, “Target Applications,” http://sibyte.com/mercurian/applications.htm, Jan. 15, 2001, 2 pages.
SiByte, “SiByte Technology,” http://sibyte.com/mercurian/technology.htm, Jan. 15, 2001, 3 pages.
SiByte, “The Mercurian Processor,” http://sibyte.com/mercurian, Jan. 15, 2001, 2 pages.
SiByte, “Fact Sheet,” SB-1 CPU, Oct. 2000, rev. 0.1, 1 page.
SiByte, “Fact Sheet,” SB-1250, Oct. 2000, rev. 0.2, 10 pages.
Stepanian, SiByte, SiByte SB-1 MIPS64 CPU Core, Enbedded Processor Forum 2000, Jun. 13, 2000, 15 pages.
Jim Keller, “The Mercurian Processor: A High Performance, Power-Efficient CMP for Networking,” Oct. 10, 2000, 22 pages.
Intel, “21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller,” Hardware Reference Manual, Revision 1.0, Oct. 1998, 219 pages.
European Search Report for EP26011, mailed Mar. 6, 2003, 5 pages.
EP Search Report for EP app 02025691.3, May 9, 2003, Broadcom Corp.

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