System for two-step resist soft bake to prevent ILD...

Details System for two-step resist soft bake to prevent ILD... System for two-step resist soft bake to prevent ILD...

2005-08-31

2009-10-20

Fuqua, Shawntina (Department: 3742)

Electric heating

Heating devices

Combined with container, enclosure, or support for material...

C219S444100, C432S093000, C438S795000, C430S005000

Reexamination Certificate

active

07605350

ABSTRACT:
In general, the system provides for soft baking a semiconductor wafer so that photoresist layers on the wafer are free of surface voids or craters. In particular, the system provides for manufacturing a semiconductor wafer having no photoresist craters at the completion of a two-step post-apply resist bake (soft bake) in the fabrication of an integrated circuit. In the system, the semiconductor wafer is coated with resist and then baked at both a low-bake temperature and a high-bake temperature. It is theorized that the lower temperature bake either hardens the resist layer before trapped air expands through the resist or displaces the trapped air while the resist layer remains fluid and returns to its conformal shape.

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patent: 6233190 (2001-05-01), Cooper et al.
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patent: 6830619 (2004-12-01), Shirley
patent: 2002/0034714 (2002-03-01), Deguchi et al.

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