Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1977-06-21
1978-11-07
Richardson, Robert L.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
178 68, 325 38A, H04N 516, H04L 2506
Patent
active
041248694
ABSTRACT:
A binary encoded signal which is to be clamped at a desired binary value is simultaneously applied to a digital subtractor and a digital adder. The digital subtractor subtracts the difference between the desired binary value and the value of the binary encoded signal. The resulting difference is applied to a storage flip-flop circuit having a switching pulse input which receives a periodic signal. The flip-flop transfers the last received difference until the periodic signal is received causing it to transfer the latest received difference. A binary adder adds the output of the storage flip-flop to the binary encoded signal. This results in a corrected clamped binary encoded signal.
REFERENCES:
patent: 3267459 (1966-08-01), Chomicki et al.
patent: 3518662 (1970-06-01), Nakagome et al.
patent: 3777056 (1973-12-01), Pieters
Richardson Robert L.
Robert & Bosch GmbH
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