Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-12-29
2001-07-31
Karlsen, Ernest (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S764010, C324S755090
Reexamination Certificate
active
06268740
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a test system for testing semiconductor elements (hereinafter referred to as “IC chips”) formed on a semiconductor wafer (hereinafter referred to as “wafer”). More specifically, the invention relates to a test system which brings a wafer and a contactor into contact with each other to form a one-body structure (hereinafter referred to as a “test shell”), then tests electrical characteristics of the IC chips by use of that test shell, and smoothly disassembles the test shell back into the wafer and the contactor at the end of the test. It should be noted in particular that the present invention is suitably applicable to a reliability test system.
The contactor is an electric contact means that is provided with: contact terminals which are simultaneously brought into electrical contact with the electrodes of a plurality of IC chips on a wafer; and external terminals that are connected to the contact terminals. The contactor, the wafer and a wafer holder (hereinafter referred to as a “wafer chuck”) are assembled as a one-body structure by vacuum suction, and a technique for forming a test shell thereby is referred to as an aligner.
BACKGROUND ART
In a semiconductor inspection process, the electrical characteristics of a large number of IC chips formed on the surface of a wafer are examined. On the basis of the results of this examination, the IC chips are screened to select those ones that have no electrical defects. The non-defective chips selected by the screening are subjected to an assembling process, in which they are packaged in synthetic resin or a ceramic material. In a reliability test, the packaged products are examined, with thermal stress and electrical stress being applied thereto. In this test, potential defects or the like of the IC chips are detected, and IC chips having such defects are removed.
In accordance with the demand for small-sized and sophisticated electrical products, IC chips that are developed are also miniaturized and highly integrated. In recent years, a variety of mount techniques have been developed, so as to provide further compact semiconductor products. For example, there is technology that enables the mounting of a so-called bare IC chip (i.e., an IC chip that is not packaged). In order to commercialize bare IC chips, their quality must be guaranteed beforehand. In other words, the reliability of the bare IC chips must be tested so as to place quality-guaranteed IC chips on the market. If the conventional reliability test apparatus is employed for the inspection of bare IC chips, various problems have to be solved. For one thing, a reliable electrical connection has to be made between bare IC chips and sockets. In addition, it is very troublesome to handle small-sized IC chip, resulting in an increase in the inspection cost.
Under the circumstances, technology for executing a reliability test for testing a large number of IC chips formed on a plurality of wafers, is proposed. Such technology is proposed, for example, in Jpn. Pat. Appln. KOKAI Publications No. 7-231019, No. 8-5666 and No. 8-340030.
In the conventional art, however, a contactor and wafers are arranged to face each other when the wafers are simultaneously brought into contact with the contactor. Some of the contact terminals, which are used as reference points of the contactor, are visually positioned with respect to the corresponding electrode pads, which are used as reference points of the wafers (the position operation will be hereinafter referred to as “alignment”). Since it takes a long time for the operator to finish the alignment, the alignment has problems in that the operation efficiency is low, a heavy load is imposed on the operator, and the alignment accuracy is dependent on the operator's ability for visual alignment, resulting in failure to provide a stable contact state at all times.
In order to realize a reliability test system, the present applicant proposed an aligner for a shell assembling mechanism in Japanese Patent Application No. 10-54423. The shell assembling mechanism comprises: a wafer holder member (hereinafter referred to as “wafer chuck”) that is positioned and held on a mount table (hereinafter referred to as a “main chuck”) by means of positioning pins; a wafer placed on the wafer chuck by a conveyance mechanism (hereinafter referred to as “tweezers”); and a contactor removably attached to the head plate of the main apparatus. These three structural components are assembled as a one-body structure by vacuum suction. The aligner aligns a wafer with the contactor by moving the main chuck in X, Y, Z and &thgr; directions, and raises the main chuck to simultaneously bring the above three structural components into contact with one another. The vacuum coupling of the main chuck is connected to the valve mechanism of the wafer chuck, and the wafer and the contactor are sucked to the wafer chuck by utilization of the vacuum suction of the wafer chuck. In Japanese Patent Application No. 9-318920, the present applicant also proposed a wafer temperature control apparatus and a wafer storage chamber (hereinafter referred to as a “test chamber”) that allow a wafer, assembled as a shell, to be kept at a constant test temperature during a reliability test. It should be noted that after the reliability test is conducted in the test chamber, the shell is disassembled into three components, namely, a wafer chuck, a wafer and a contactor in the aligner. At the time of this disassembling operation, the main chuck on which the shell is mounted must be positioned to the same location as that where it was when the shell was formed (the location must be the same in light of the X, Y and &thgr; directions). If the main chuck is raised to a different location to mount the shell on the main chuck, the positioning pin holes of the wafer chuck of the shell loaded on the head plate do not align with the positioning pins of the main chuck. As a result, the shell cannot be placed on the main chuck in a positioned state. Since, in this case, the vacuum coupling of the main chuck and the valve mechanism of the wafer chuck are not connected, the shell is not released from the vacuum state. Accordingly, the shell cannot be disassembled into the three components described above.
DISCLOSURE OF INVENTION
The present invention has been contrived to solve the above problems. Accordingly, the object of the present invention is to provide a test system which, at the end of a test, automatically moves a main chuck (mount table) to a position where a wafer chuck, a wafer and a contactor are assembled as one body to form a shell, then places the shell on the main chuck in a positioned state, and then disassembles the shell into the three components.
According to the first aspect of the present invention, there is provided a test system for testing semiconductor elements formed on a semiconductor wafer, the test system comprising:
an aligner for bringing three components into contact with one another to form a one-body structure, the three components being a wafer holder member used for holding a semiconductor wafer, a semiconductor wafer having a plurality of semiconductor elements on a surface, and a contactor having a plurality of contact terminals to be brought into electric contact with electrodes of the semiconductor elements, and for using the one-body structure as a test shell,
the aligner including:
a shell assembling mechanism for forming the test shell by vacuum suction;
a first read device for reading the shell identification code attached to the test shell;
a first storage device for storing the read shell identification code; and
a first control device for controlling the shell assembling mechanism to form the test shell;
a test apparatus for executing a test with respect to the semiconductor elements of the test shell,
the test apparatus including:
a second read device for reading the shell identification code attached to the test shell; and
a second storage device for storing results of the test in association with the shel
Karlsen Ernest
Morrison & Foerster L
Tang Minh N.
Tokyo Electron Limited
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