System for testing a fault detecting means

Details System for testing a fault detecting means System for testing a fault detecting means

1997-01-03

1998-05-26

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

057578117

ABSTRACT:
The invention provides a test system of a fault detecting means, in which, during a normal operation, a fault forcibly generating circuit lets a transmission path signal inputted from the outside pass through as it is, generates a test signal which is the same as that of the transmission path signal, and outputs it to a fault detecting circuit. During a time of testing, the fault forcibly generating circuit outputs "Low" level of the test signal forcibly to the fault detecting circuit, according to a test control signal outputted from a control portion. When the fault detecting circuit detects this test signal, an step-out alarm is generated and transmitted to the control portion. The control portion monitors the step-out alarm from the fault detecting circuit. The control portion judges the operation to be normal if the step-out alarm is outputted, and to be abnormal if the step-out alarm is not outputted under the condition that the step-out alarm is not outputted at the time of non-testing.

REFERENCES:
patent: 5627969 (1997-05-01), Kobayashi et al.
patent: 5642359 (1997-06-01), Nassehi

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