System for synchronizing data frame groups in a serial bit strea

Details System for synchronizing data frame groups in a serial bit strea System for synchronizing data frame groups in a serial bit strea

1989-06-30

1991-04-02

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

370105, 375114, H04J 306

Patent

active

050051911

ABSTRACT:
A synchronizer in a receiver for a serial data stream includes a shift register for temporarily storing the most recently received data. Taps at a plurality of locations on such shift register provide bit signals at regularly spaced locations. A cyclic shift register is clocked each time a true frame bit is received. Combinational logic connected to the data taps determines whether a pattern indicating a possible multiframe alignment exists at the data taps. Multiframe candidates are stored in the cycle shift register until all but one are eliminated, with the remaining candidate indicating multiframe alignment.

REFERENCES:
patent: 4316285 (1982-02-01), Bobilin et al.
patent: 4730346 (1988-03-01), Jiang
patent: 4811367 (1989-03-01), Tajika
patent: 4930125 (1990-05-01), Bains

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