System for speeding up the arithmetic coding processing and...

Coded data generation or conversion – Digital code to digital code converters – To or from code based on probability

Reexamination Certificate

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Details

C051S302000, C382S232000, C382S244000, C382S247000

Reexamination Certificate

active

11305013

ABSTRACT:
A system for speeding up the arithmetic coding processing and method thereof is used in a calculating method in which when the input data are two successive same pixel values and the context values (CX) thereof. The output interval size A and base C are determined by adding a set of operation circuits and a set of speed-up tables, such that the A, C values which needed two clock cycles previously may be calculated within a clock cycle, thereby achieving the object of speeding up the arithmetic coding processing.

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patent: 5587710 (1996-12-01), Choo et al.
patent: 6075471 (2000-06-01), Kimura et al.
patent: 6081213 (2000-06-01), Hosaka
patent: 6549665 (2003-04-01), Hirao
patent: 6553144 (2003-04-01), Hirao et al.
patent: 6825782 (2004-11-01), Bossen

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