System for selectively addressing nested link return addresses i

Details System for selectively addressing nested link return addresses i System for selectively addressing nested link return addresses i

1980-03-26

1982-09-07

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 922

Patent

active

043487211

ABSTRACT:
An improved arrangement is disclosed for storing link address data which is generated by a microcontroller during the execution of a program which involves a series of nested link type instructions and for returning the stored link address data under program control so that the program may be returned to a selected one of a plurality of branch points. The improved arrangement involves memory addressing circuitry for addressing a memory which stores instructions, a storage device for storing link addresses which are transferred from the memory address circuitry to the storage device when link type instructions are executed, storage addressing circuitry which controls the location in the storage device where the link address data is stored, control circuitry which is responsive to one instruction having a predefined field, the value of which is determined by the microprogrammer and which determines which of the nested link address data is to be returned to the memory addressing circuitry.

REFERENCES:
patent: 3909797 (1975-09-01), Goss et al.
patent: 3988719 (1976-10-01), Whitby et al.

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