System for selective metallization of electronic interconnection

Details System for selective metallization of electronic interconnection System for selective metallization of electronic interconnection

1984-09-04

1987-05-26

Childs, Sadie L.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427 98, 427304, 427305, 427306, B05D 512

Patent

active

046685324

ABSTRACT:
An improved process for selective metallization of insulating substrates, as for example in the manufacture of wire scribed interconnection boards, is provided. The substrates optionally include one or more holes or cavities for electrical connections. The process comprises applying an insulating, hydrophobic mask onto the surface of a suitable insulating substrate so as to leave exposed selected areas to be metallized, contacting the substrate with an activator solution for a sufficient time to deposit a catalytic species onto the exposed areas of the substrate and the mask and on the walls of the holes or cavities and thereby render them catalytic to the reception of metal, accelerating the catalytic species and preferentially removing essentially all of the catalytic species from the hydrophobic mask by contacting the substrate with a chelating agent in an alkaline solution having a pH between about 10 and about 14 for a time period sufficient to remove essentially all of said catalytic species from the mask, and then contacting the substrate with a metal deposition solution to metallize only the exposed catalytic areas of the substrate not protected by the hydrophobic mask.

REFERENCES:
patent: 3443988 (1969-05-01), McCormack et al.
patent: 3562038 (1971-02-01), Shipley et al.
patent: 3799816 (1974-03-01), Schneble et al.
patent: 4151313 (1979-04-01), Wajima et al.
patent: 4181750 (1980-01-01), Beckenbaugh et al.
patent: 4293592 (1981-10-01), Morishita et al.
patent: 4388351 (1983-06-01), Sawyer

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